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本文着重分析变容管宽带倍频器的电路模型和实现宽带倍频条件;讨论了这种倍频器的工程设计方法;介绍倍频效率为65％,带宽为25％的二千兆赫变容管宽带二倍频器的设计参数、电路结构及性能曲线。
This article focuses on the analysis of the varactor broadband multiplier circuit model and the realization of the broadband frequency doubling conditions; discussion of this frequency multiplier engineering design methods; introduced doubler efficiency of 65%, bandwidth 25% Tube broadband doubler design parameters, circuit structure and performance curve.